#REQUEST.pageInfo.pagedescription#

Site Navigation

ELTR7010 - HDL Digital System Design

banner1
Title:HDL Digital System Design
Long Title:HDL Digital System Design
Module Code:ELTR7010
 
Duration:1 Semester
Credits: 5
NFQ Level:Intermediate
Field of Study: Electronic Engineering
Valid From: Semester 1 - 2020/21 ( September 2020 )
Module Delivered in 2 programme(s)
Module Coordinator: MARTIN HILL
Module Author: PADDY COLLINS
Module Description: This module will introduce students to techniques for the design and implementation of digital circuits using a Hardware Description Language (HDL). It will include concepts such as programmable logic , programmable logic systems, and digital system development software.
Learning Outcomes
On successful completion of this module the learner will be able to:
LO1 Discuss the digital design process flow and describe the purpose and characteristics of each process step.
LO2 Describe the construction and characteristics of common reconfigurable logic circuit architectures.
LO3 Design a digital system using a common HDL (for example: Verilog, VHDL) and using a development system that can be interfaced to programmable logic ICs.
LO4 Simulate a digital system to verify its operation. Program a field-programmable gate array (FPGA) or complex programmable logic device (CPLD) from a recognised vendor to implement the simulated design.
LO5 Work as part of a team to design a complex digital system by partitioning a large design into a series of smaller sub-blocks which can be implemented by individuals or small groups and then merged together into a functional system.
Pre-requisite learning
Module Recommendations

This is prior learning (or a practical skill) that is strongly recommended before enrolment in this module. You may enrol in this module if you have not acquired the recommended learning but you will have considerable difficulty in passing (i.e. achieving the learning outcomes of) the module. While the prior learning is expressed as named MTU module(s) it also allows for learning (in another module or modules) which is equivalent to the learning specified in the named module(s).

Students will have a working knowledge of basic digital electronic concepts.
Incompatible Modules
These are modules which have learning outcomes that are too similar to the learning outcomes of this module. You may not earn additional credit for the same learning and therefore you may not enrol in this module if you have successfully completed any modules in the incompatible list.
No incompatible modules listed
Co-requisite Modules
No Co-requisite modules listed
Requirements

This is prior learning (or a practical skill) that is mandatory before enrolment in this module is allowed. You may not enrol on this module if you have not acquired the learning specified in this section.

No requirements listed
 

Module Content & Assessment

Indicative Content
Digital design techniques.
Introduction to digital design terminology, process flow, techniques, and concepts.
Programmable logic
Introduction to programmable logic architectures and systems.
Hardware Description Language (HDL)
HDL syntax, format, and application.
Digital design systems
Commercially common programmable logic systems from recognised vendors.
Assessment Breakdown%
Course Work100.00%
Course Work
Assessment Type Assessment Description Outcome addressed % of total Assessment Date
Practical/Skills Evaluation Design and simulate a digital circuit using a HDL 3,4 20.0 Week 4
Practical/Skills Evaluation Design and simulate a complex digital circuit using a HDL 3,4 30.0 Week 8
Practical/Skills Evaluation Work as part of a team to design, implement and simulate a complex digital system and report on how the design was partitioned. 3,4,5 20.0 Week 12
Short Answer Questions Assessment of theoretical concepts 1,2,3 30.0 Week 13
No End of Module Formal Examination
Reassessment Requirement
Repeat examination
Reassessment of this module will consist of a repeat examination. It is possible that there will also be a requirement to be reassessed in a coursework element.

The institute reserves the right to alter the nature and timings of assessment

 

Module Workload

Workload: Full Time
Workload Type Workload Description Hours Frequency Average Weekly Learner Workload
Lecture Delivery of theory. 1.0 Every Week 1.00
Lab Practical application of theory. 3.0 Every Week 3.00
Independent & Directed Learning (Non-contact) Revision of class material. Preparation for lab work. 3.0 Every Week 3.00
Total Hours 7.00
Total Weekly Learner Workload 7.00
Total Weekly Contact Hours 4.00
Workload: Part Time
Workload Type Workload Description Hours Frequency Average Weekly Learner Workload
Lecture Delivery of theory. 1.0 Every Week 1.00
Lab Practical application of theory. 2.0 Every Week 2.00
Independent & Directed Learning (Non-contact) Revision of class material. Preparation for mini project. 4.0 Every Week 4.00
Total Hours 7.00
Total Weekly Learner Workload 7.00
Total Weekly Contact Hours 3.00
 

Module Resources

Supplementary Book Resources
  • Floyd 2015, Digital Fundamentals, 11th Edition Ed. [ISBN: 9780132737968]
This module does not have any article/paper resources
Other Resources
 

Module Delivered in

Programme Code Programme Semester Delivery
CR_EELES_8 Bachelor of Engineering (Honours) in Electronic Engineering Sept 2021 5 Mandatory
CR_EELXE_7 Bachelor of Engineering in Electronic Engineering 5 Mandatory

Cork Institute of Technology
Rossa Avenue, Bishopstown, Cork

Tel: 021-4326100     Fax: 021-4545343
Email: help@cit.edu.ie