#REQUEST.pageInfo.pagedescription#

Site Navigation

ELTR6025 - Mixed Signal Digital

banner1
Title:Mixed Signal Digital
Long Title:Mixed Signal Digital
Module Code:ELTR6025
 
Duration:1 Semester
Credits: 5
NFQ Level:Fundamental
Field of Study: Electronic Engineering
Valid From: Semester 1 - 2020/21 ( September 2020 )
Module Delivered in 3 programme(s)
Module Coordinator: MARTIN HILL
Module Author: MARTIN HILL
Module Description: This module gives the student a sound knowledge of the principles, practice, and applications of digital CMOS electronic circuits. The theoretical aspects of the module will be supported by practical laboratory sessions. The lab sessions will both build/test and simulate a range of CMOS circuits.
Learning Outcomes
On successful completion of this module the learner will be able to:
LO1 Explain the operation of the MOSFET and be able to measure and predict its large signal performance.
LO2 Explain the operation and key parameters of CMOS logic and flip flops and be able to build and test some of these circuits.
LO3 Explain the operation and applications for common AtoD DtoA and S/H architectures.
LO4 Explain the operation of different electronic memory and programmable logic devices.
LO5 Use simulation software for circuit design, construction, debug and understanding.
Pre-requisite learning
Module Recommendations

This is prior learning (or a practical skill) that is strongly recommended before enrolment in this module. You may enrol in this module if you have not acquired the recommended learning but you will have considerable difficulty in passing (i.e. achieving the learning outcomes of) the module. While the prior learning is expressed as named MTU module(s) it also allows for learning (in another module or modules) which is equivalent to the learning specified in the named module(s).

Incompatible Modules
These are modules which have learning outcomes that are too similar to the learning outcomes of this module. You may not earn additional credit for the same learning and therefore you may not enrol in this module if you have successfully completed any modules in the incompatible list.
No incompatible modules listed
Co-requisite Modules
No Co-requisite modules listed
Requirements

This is prior learning (or a practical skill) that is mandatory before enrolment in this module is allowed. You may not enrol on this module if you have not acquired the learning specified in this section.

No requirements listed
 

Module Content & Assessment

Indicative Content
MOSFET Operation
Operation of metal-oxide semiconductor field-effect transistor (MOSFET), principles of operation, derive large signal equations, notable metrics from a digital perspective.
CMOS Logic
Detailed description of CMOS inverter, CMOS logic gate operation and performance.
CMOS Sequential Blocks
CMOS latch and flip-flop, operation and performance parameters.
AtoD, DtoA and S/H Circuits
Operation and performance of common analogue-to-digital conversion (ADC) and digital-to-analogue conversion (DAC) circuits. Operation and performance of sample/hold (S/H) circuits.
Semiconductor Memory and Programmable Logic Devices (PLDs)
Characteristics of solid-state memory. Random access memory (RAM): static (SRAM) and dynamic (DRAM). Read-only memory (ROM): PROM, EPROM, EEPROM. Introduction to field-programmable gate arrays (FPGAs) and PLDs.
Assessment Breakdown%
Course Work100.00%
Course Work
Assessment Type Assessment Description Outcome addressed % of total Assessment Date
Performance Evaluation In Lab assessment, MOSFET operation will be examined, MOSFET measurements and predictions from MOSFET equations will be tested. 1,2 20.0 Week 5
Performance Evaluation Measurements and simulation of CMOS logic and Flip-flops 2 30.0 Week 9
Critique Simulation and written examination of AtoD/DtoA, S/H, memory and programmable logic 3,4,5 50.0 Week 13
No End of Module Formal Examination
Reassessment Requirement
Coursework Only
This module is reassessed solely on the basis of re-submitted coursework. There is no repeat written examination.

The institute reserves the right to alter the nature and timings of assessment

 

Module Workload

Workload: Full Time
Workload Type Workload Description Hours Frequency Average Weekly Learner Workload
Lecture Theoretical foundations for CMOS circuits. 2.0 Every Week 2.00
Lab CMOS circuit design, simulation and analysis software. 2.0 Every Week 2.00
Independent & Directed Learning (Non-contact) Review of lecture notes, resources, preparation for lab assignments and reports. 3.0 Every Week 3.00
Total Hours 7.00
Total Weekly Learner Workload 7.00
Total Weekly Contact Hours 4.00
Workload: Part Time
Workload Type Workload Description Hours Frequency Average Weekly Learner Workload
Lecture Theoretical foundations for CMOS circuits. 1.5 Every Week 1.50
Lab CMOS circuit design, simulation and analysis software. 1.5 Every Week 1.50
Independent & Directed Learning (Non-contact) Review of lecture notes, resources, preparation for lab assignments and reports. 4.0 Every Week 4.00
Total Hours 7.00
Total Weekly Learner Workload 7.00
Total Weekly Contact Hours 3.00
 

Module Resources

Recommended Book Resources
  • R. Jacob Baker IEEE Press Wiley 2019, CMOS Circuit Design Layout and Simulation, 4th Ed. [ISBN: 978-111 948 1]
Supplementary Book Resources
  • Razavi, Behzad McGraw-Hill Education 2016, Design of Analog CMOS Integrated Circuits, 2nd Ed. [ISBN: 978-125925509]
This module does not have any article/paper resources
This module does not have any other resources
 

Module Delivered in

Programme Code Programme Semester Delivery
CR_EELES_8 Bachelor of Engineering (Honours) in Electronic Engineering Sept 2021 3 Mandatory
CR_EELXE_7 Bachelor of Engineering in Electronic Engineering 3 Mandatory
CR_EELXE_6 Higher Certificate in Engineering in Electronic Engineering 3 Mandatory

Cork Institute of Technology
Rossa Avenue, Bishopstown, Cork

Tel: 021-4326100     Fax: 021-4545343
Email: help@cit.edu.ie