| Title: | Computer Architecture |
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| Long Title: | Computer Architecture |
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| Field of Study: |
Computer Science
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| Valid From: |
Semester 1 - 2017/18 ( September 2017 ) |
| Module Coordinator: |
Sean McSweeney |
| Module Author: |
JOHN CREAGH |
| Module Description: |
This module covers such topics as number systems and codes, Boolean algebra, sequential and combinational logic circuits, adders, registers and counters, and fundamental computer organisation. The representation of data in computer systems is outlined. Laboratory exercises help students gain the knowledge necessary to understand number systems and logic circuits. |
| Learning Outcomes |
| On successful completion of this module the learner will be able to: |
| LO1 |
Explain the basic elements and interconnections that make up a computer. |
| LO2 |
Appraise the use of number systems and code in computer systems. |
| LO3 |
Describe low-level program execution. |
| LO4 |
Examine and implement sequential and combinatorial circuits. |
| LO5 |
Describe logic and explain logic circuitry as used in ALU and memory. |
| Pre-requisite learning |
Module Recommendations
This is prior learning (or a practical skill) that is strongly recommended before enrolment in this module. You may enrol in this module if you have not acquired the recommended learning but you will have considerable difficulty in passing (i.e. achieving the learning outcomes of) the module. While the prior learning is expressed as named MTU module(s) it also allows for learning (in another module or modules) which is equivalent to the learning specified in the named module(s).
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Incompatible Modules
These are modules which have learning outcomes that are too similar to the learning outcomes of this module. You may not earn additional credit for the same learning and therefore you may not enrol in this module if you have successfully completed any modules in the incompatible list. |
| No incompatible modules listed |
Co-requisite Modules
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| No Co-requisite modules listed |
Requirements
This is prior learning (or a practical skill) that is mandatory before enrolment in this module is allowed. You may not enrol on this module if you have not acquired the learning specified in this section.
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| No requirements listed |
Module Content & Assessment
| Indicative Content |
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Computer Architecture Overview
CPU: arithmetic and logic unit, control unit, central memory, ports, buses (control, data, address), memory, cache.
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Low-Level Program Execution
Fetch-execute cycle: overview description of a processor (for example, Intel 80X86 family), bits, bytes, words, processing power. Peripherals: uses and operational characteristics.
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Information Representation and Number Systems
Data representation: binary and hexadecimal notation, character codes (ASCII, EBCDIC), numeric codes (signed and unsigned binary including 1s and 2s complement, BCD, Gray code). Conversion from one data representation to another. Representation of data in software programmes, including integer and floating point variables. Hamming code, using Hamming codes and advantages and limitations.
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Computer Logic
Boolean algebra, sequential and combinational logic circuits. Basic logic gates, Boolean algebra, Boolean expressions. Simplification, K-Map design, flip flops, shift registers, decoders, memory organisation, 1/2 + Full Adders. Components involved in a simple processor include registers, memory and ALU components (such as ripple carry adder).
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| Assessment Breakdown | % |
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| Course Work | 40.00% |
| End of Module Formal Examination | 60.00% |
| Course Work |
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| Assessment Type |
Assessment Description |
Outcome addressed |
% of total |
Assessment Date |
| Multiple Choice Questions |
An in-class examination that will require the student to demonstrate understanding of basic elements of a computer, number systems and code in computer systems. |
1,2 |
20.0 |
Week 4 |
| Practical/Skills Evaluation |
A series of laboratory practicals will be undertaken by students who will then produce their findings in a document normally each week, which will be assessed. This will take place from week 5 to week 12. |
3,4,5 |
20.0 |
Every Week |
| End of Module Formal Examination |
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| Assessment Type |
Assessment Description |
Outcome addressed |
% of total |
Assessment Date |
| Formal Exam |
End-of-Semester Final Examination |
1,2,3,4,5 |
60.0 |
End-of-Semester |
| Reassessment Requirement |
Repeat examination
Reassessment of this module will consist of a repeat examination. It is possible that there will also be a requirement to be reassessed in a coursework element.
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The institute reserves the right to alter the nature and timings of assessment
Module Workload
| Workload: Full Time |
| Workload Type |
Workload Description |
Hours |
Frequency |
Average Weekly Learner Workload |
| Lecture |
Lecture to deliver the theory that underpins the learning outcomes |
2.0 |
Every Week |
2.00 |
| Lab |
Lab to support the learning outcomes |
2.0 |
Every Week |
2.00 |
| Independent & Directed Learning (Non-contact) |
Independent study |
3.0 |
Every Week |
3.00 |
| Total Hours |
7.00 |
| Total Weekly Learner Workload |
7.00 |
| Total Weekly Contact Hours |
4.00 |
| Workload: Part Time |
| Workload Type |
Workload Description |
Hours |
Frequency |
Average Weekly Learner Workload |
| Lecture |
Lecture to deliver the theory that underpins the learning outcomes |
2.0 |
Every Week |
2.00 |
| Lab |
Lab to support the learning outcomes |
2.0 |
Every Week |
2.00 |
| Independent & Directed Learning (Non-contact) |
Independent Study |
3.0 |
Every Week |
3.00 |
| Total Hours |
7.00 |
| Total Weekly Learner Workload |
7.00 |
| Total Weekly Contact Hours |
4.00 |
Module Resources
| Recommended Book Resources |
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- Warford J S 2010, Computer Systems, 4 Ed., Jones & Bartlett Publishers [ISBN: 9780763771447]
- R. C. Detmer 2014, Introduction to 80X86 Assembly Language and Computer Architecture, 3 Ed., Jones & Bartlett Publishers [ISBN: 9781284036121]
| | This module does not have any article/paper resources |
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| Other Resources |
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- Website: Pep/8 assembler and simulator
- E-Book: David Tarnoff 2011, Computer Organization and Design
Fundamentals
, http://faculty.etsu.edu/tarnoff/138292/
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Module Delivered in
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